Skip to content
View alitariq4589's full-sized avatar
9 followers · 2 following

Achievements

Achievement: Pair Extraordinairex3Achievement: Pull Sharkx3Achievement: YOLOAchievement: Quickdraw

Achievements

Achievement: Pair Extraordinairex3Achievement: Pull Sharkx3Achievement: YOLOAchievement: Quickdraw

Highlights

Block or report alitariq4589

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
alitariq4589/README.md

📊 GitHub Stats

Certifications

CNCF Certified Kubernetes Administrator
Linux Foundation, Cloud Native Computing Foundation, May 2026
RISC-V Developer Appreciation Award
RISE, The Linux Foundation, July 2025

About Me

I'm a certified Senior Software Engineer and active open-source contributor specializing in RISC-V architecture, from bootloaders and operating systems to Secure Cloud deployment and CI/CD automation.

In open source, my work focuses on making the RISC-V ecosystem more accessible, testable, and production-ready by bridging low-level firmware (such as Linux kernel, U-Boot, device drivers) with modern DevOps (such as Github actions, GitLab CI, Jenkins CI, etc.) and containerisation (such as Docker, podman, LXC, Kubernetes) and cloud workflows.

Click the box above to view a list of contributions in the Linux kernel

Where I’m Dwelling

Core Focus (Deep Work & Contributions)

  • Enabling CI/CD for RISC-V Ecosystem: Application Porting, Open-source software contribution
  • Bootloaders & OS Internals: U-Boot, OpenSBI, Linux kernel bring-up, device trees

Active Domains (Day-to-Day Engineering)

  • CI/CD & Automation: GitHub Actions, GitLab CI, Jenkins, LAVA KernelCI, maintaining distributed ISA Kubernetes worker nodes
  • Cloud & Infrastructure: Docker, Ansible, CloudFormation, Terraform, Prometheus, Grafana

Exploring & Expanding

  • Linux Kernel and Linux device drivers
  • RISC-V ISA and upcoming extensions in new boards
  • Automation at scale with open-source software
  • Microkernel design and experimentation

Featured RISC-V Work

Cloud-V RISC-V CI Platform
A platform enabling the open-source community to get access to RISC-V boards and connect with RISC-V enthusiasts.

LAVA kernelCI port for Banana Pi F3 (Spacemit K1, RISC-V SoC)

  • Added UART Y-modem boot support in SPL
  • Modified bootflow to load U-Boot proper via UART and kernel/rootfs via NFS/TFTP
  • Enabled CI integration with LAVA (Linaro Automation Validation Architecture)
  • Blog and source code

GitHub Actions runner port for RISC-V

  • Patched the upstream source code of the GitHub Actions runner package to run on RISC-V with .NET version 10

Pinned Loading

  1. saber-v saber-v Public

    A micro-kernel designed for valiadtion of RISC-V computers

    C

  2. lava-webserver-riscv lava-webserver-riscv Public

    Repository contains docs for adding RISC-V device to Linaro's LAVA webserver

    C++ 3

  3. cloud-v-builds cloud-v-builds Public

    1 2

  4. riscv-gitlab-ci-infra riscv-gitlab-ci-infra Public

    Sets up GitLab CI infrastructure for RISC-V board farms.

    Python

  5. riscv-isac riscv-isac Public

    Forked from riscv-software-src/riscv-isac

    Python

  6. riscv-software-src/riscv-ctg riscv-software-src/riscv-ctg Public archive

    Python 42 52